Field of the Invention
This invention relates generally to train control systems, and more specifically to a distributed solid state interlocking that includes a plurality of intelligent wayside signal devices such as track circuits, signal aspects, traffic controllers, track switch machines, automatic train stop machines, etc. An intelligent signal device makes its own determination related to the functionality and operation of the device, and continuously monitors its own state. For example, an intelligent signal determines its own aspect, and the position of its associated stop mechanism when used in transit applications. Similarly, an intelligent switch determines if the switch should be locked or not, and monitors the position and status of the switch. The intelligent wayside devices are interconnected together by a data network to detect train movements, and provide safe operation of trains through interlockings, as well as in automatic block signal controlled territory.
Description of Prior Art
Solid State Interlockings (SSI), a.k.a. Electronic Interlockings, are well known, and have evolved from the relay-based interlockings that are widely used at various railroads, and transit properties around the world. Typically, a solid state interlocking consists of a centralized vital processor that controls a plurality of signal peripherals, including signal aspects, track switch machines, automatic trip stop devices, and the like. The prior art employs a safety critical software logic that executes on the vital processor, and which is based either on Boolean equations that emulates conventional relay logic or, in the alternative, on a set of interlocking rules that are applied to a vital data base that describes the interlocking configuration. However, all Solid State Interlockings described in the prior art share the common characteristic of having the safety critical software logic executes on a central vital processor, which in turn controls various I/O devices that interface with office and wayside signal peripherals. Such interfaces to wayside signal apparatuses are normally implemented using copper cables from the centralized processor location to the various field locations where the signal apparatuses or peripherals are installed.
This centralized architecture employed by the prior art has a number of limitations and disadvantages. First, the implementation of a centralized interlocking configuration requires the installation of a large number of copper cables that interconnects the I/O ports of the centralized interlocking processor to the various signal peripherals at field locations. Such copper cables are expensive to furnish, install, test, and maintain. These copper installations require maintenance and protection against grounds, crosses, and other electrical faults. The Federal Railroad Administration (FRA) requires periodic testing of these cables to ensure the integrity of the signal installations. Further, copper installations are susceptible to electro-magnetic interference, and require shielding.
Second, the centralized architecture is susceptible to catastrophic failures, which normally cause a decommissioning of an entire interlocking. While there are a number of redundancy schemes that could be used to decrease the probability of such catastrophic failures, a catastrophic failure could still occur because of a common software fault, or due to external factors such as human error, grounding faults, lightening, or other electrical spikes.
Third, for a medium or a large size interlocking, the system response time is generally slower than the response time provided by a relay installation. This is mainly due to communication delays/time outs between the centralized processor & I/O boards, redundancy configurations to comply with hot standby requirements, and the I/O interfaces to the various signal peripherals. Also, slower response time occurs as a result of the processing time required for of a plurality of iterations of the entire interlocking logic software, and to implement safety features such as vital shutdown of the centralized processor.
Fourth, it is normally difficult and time consuming to design a centralized interlocking logic either by emulating relay logic circuits, or by developing a set of interlocking rules and associated vital data base. This is particularly the case for a large interlocking.
Fifth, after making a change or modification to a centralized vital interlocking logic software, it is necessary to perform extensive retesting of the interlocking functions.
The present invention addresses the limitations, and disadvantages of the prior art by employing a distributed processing configuration, by providing a physical and logical isolation between the various interlocking components, and by allocating and distributing the interlocking control logic to the various signal apparatuses.